Name Size
Parent Directory -
Makefile 1k
cpu.c 1k
cpu.h 1k
gpiopins.c 1k
gpiopins.h 24k
leds.c 1k
libs/ -
serial.c 9k
stm32f4.mk 1k
stm32f407vg.S 7k
stm32f407vg.debugjlink 1k
stm32f407vg.ld 2k
test_conio.c 2k
test_float.c 1k
test_freertos.c 3k
test_gpio.c 1k
test_systick.c 1k
The C run time startup code stm32f4xxxx.S and linker script stm32f4xxxx.ld were written by myself based on various examples on the Internet and in The Definitive Guide to the ARM Cortex-M3.
Other files are original works by myself, and are hereby placed into the public domain.
| Code Flash: | 0x00000000 to 0x000FFFFF | 1024 KB |
| Data RAM: | 0x20000000 to 0x2001FFFF | 128 KB |
| CCM RAM: | 0x10000000 to 0x1000FFFF | 64 KB |
The STM32F4 microcontrollers can have any of code flash at 0x08000000, system memory (serial boot loader) at 0x1FFF0000, or data ram at 0x20000000 mapped to address 0x00000000, depending on the BOOT0 and BOOT1 pins. This framework assumes BOOT0 is strapped low, mapping code flash to 0x00000000.
This framework assumes a single stack for both thread and handler modes, using MSP (Main Stack Pointer) at the end of CCM (Core Coupled Memory) RAM. The C heap is placed at the beginning of CCM RAM (at 0x10000000). Other C data sections are placed at the beginning of data RAM (at 0x20000000).
Note: CCM RAM is inaccessible to peripherals (DMA/Ethernet/USB).
This framework may be used for other devices in the ST STM32F4 family, provided the following files are modified:
| stm32f4xxxx.ld | The RAM and ROM sizes must match the device. |
| cpu.h | The default CPU frequency must match the device. |
| cpu.c | The clock initialization code must match the device. |
This framework is validated on the STM32F4-Discovery board.
Tested on 30 November 2011 with gcc 4.6.2.
$Id: README.html 3212 2011-10-20 04:26:54Z svn $
I am available for custom system development (hardware and software) of products using the STM32F4 or other microcontrollers.